#aSiC

Thor A. Hoplandhopland@snabelen.no
2026-02-24

And here we are, ladies and gentlemen. I told you. The same happened to #crypto. Someone went and made an #ASIC built specifically for #AI inference with #Llama models - and not a DRAM chip in sight. #GPU s are still be necessary for training, but this is the first crack in market saturation we've been seeing.

THERE'S LIGHT AT THE END OF THE TUNNEL, FOLKS!!!

#Taalas Launches Hardcore Chip With ‘Insane’ #AI #Inference Performance
forbes.com/sites/karlfreund/20

2026-02-23

Taalas just emerged from stealth with a claim that’s shaking the hardware world: 17,000 tokens per second on Llama 3.1 8B.

How? By physically etching the AI model directly into the silicon transistors. No HBM. No liquid cooling. Just raw, hardwired performance that is 10x faster and 20x cheaper than traditional GPU inference.

buysellram.com/blog/17000-toke

#AI #ArtificialIntelligence #AIHardware #DataCenter #MemoryWall #HBMShortage #InferenceFactory #HardcoreAI #ASIC #Taalas #NVIDIA #technology

2026-02-23

Taalas just emerged from stealth with a claim that’s shaking the hardware world: 17,000 tokens per second on Llama 3.1 8B.

How? By physically etching the AI model directly into the silicon transistors. No HBM. No liquid cooling. Just raw, hardwired performance that is 10x faster and 20x cheaper than traditional GPU inference.

The Breakthrough: Taalas has unveiled the HC1 chip, achieving a massive 17,000 tokens/second on Llama 3.1 8B. It is roughly 10x faster and 20x cheaper than traditional GPU inference.

The “Hardwired” Secret: Unlike GPUs that load software, Taalas etches the AI model directly into the silicon transistors. By physically embedding the weights, they eliminate the need for High-Bandwidth Memory (HBM).

Solving the Memory Wall: By removing the “data movement” between external memory and the processor, Taalas bypasses the industry’s biggest bottleneck—the Memory Wall—and operates entirely on standard air cooling.

The Trade-off: The chip is model-specific. While it offers “insane” efficiency for stable, high-volume production (like 24/7 chatbots), it lacks the programmability and flexibility of a GPU.

Market Impact: The rise of these specialized “Inference Factories” actually increases the long-term value of your GPUs. Because GPUs are versatile and can be repurposed for any new model, they remain the “Gold Standard” for resale and training.

Demo LLM: chat jimmy

buysellram.com/blog/17000-toke

#AI #ArtificialIntelligence #AIHardware #DataCenter #MemoryWall #HBMShortage #InferenceFactory #HardcoreAI #ASIC #Taalas #NVIDIA #technology

BuySellRam.comalexbsr@toot.io
2026-02-23

Taalas just emerged from stealth with a claim that’s shaking the hardware world: 17,000 tokens per second on Llama 3.1 8B.

How? By physically etching the AI model directly into the silicon transistors. No HBM. No liquid cooling. Just raw, hardwired performance that is 10x faster and 20x cheaper than traditional GPU inference.

buysellram.com/blog/17000-toke

#AI #ArtificialIntelligence #AIHardware #DataCenter #MemoryWall #HBMShortage #InferenceFactory #HardcoreAI #ASIC #Taalas #NVIDIA #technology

BuySellRam.comjimbsr
2026-02-23

Taalas just emerged from stealth with a claim that’s shaking the hardware world: 17,000 tokens per second on Llama 3.1 8B.

How? By physically etching the AI model directly into the silicon transistors. No HBM. No liquid cooling. Just raw, hardwired performance that is 10x faster and 20x cheaper than traditional GPU inference.

buysellram.com/blog/17000-toke

Kevin Karhan :verified:kkarhan@infosec.space
2026-02-21
Scott Gallowayscottgal@hachyderm.io
2026-02-19

Impressive. In the 'LLMs will become more efficient' a new AI accelerator chip running a SMALL (but amazingly useful 8b class model ) at *16,000 tokens a second*
This isn't for chatGPT it's for making small LLMs components in high performance systems at *manageable* cost.
Think rapid fuzzy validation, generating synthetic data, looking at sensor data (WAY faster than real-time video analysis and classification)
VERY exciting times ahead for systems design!
#ai #llm #asic
taalas.com/products/

2026-02-18

Very happy to announce the winners of our demoscene competition! 🏆

We had some amazing entries - check out what can be done in just a few square microns of silicon!

tinytapeout.com/competitions/d

Thanks again to our judges and participants!

#silicon #demoscene #ASIC

2026-02-17

3/5 All demos feature innovative approaches for graphics and music, with original design decisions. Also there is no 'small demo' here. Many entries are first time #Verilog design and certainly first time in #ASIC! Even the simplest display or music is already a great achievement.

All demos thx to @bitluni
youtube.com/watch?v=A9BhSaqL7jg

Australian Jewish Association promoting the selling of stolen Palestinian land. "Israel real estate comes to Sydney - an exclusive evening of opportunity". AJA is positioned in the material as a partner of Noam Homes

MWM reports that ASIC is inquiring into the scheme.

michaelwest.com.au/israel-lobb

#realestate #asic #aja #israel #gaza #palestine

Vibewire Magazinevibewire@mastodon.au
2026-02-16

Humm Limited conflicts of interest or ordinary business? dlvr.it/TQzmQW #Australia #AndrewAbercrombie #ASIC #HUMMLimited

Vibewire Magazinevibewire@mastodon.au
2026-02-15

Humm co-founder’s fiery stoush with activist investors comes to a head dlvr.it/TQzKTg #BreakingNews #AndrewAbercrombie #ASIC #HUMMLimited

Check out PipelineC #HDL Advent of FPGA #hardware solutions: high perf, deeply pipelined, multiple #FPGA platforms, 10's Gbit per sec throughput, easily scales: variable latency off chip mem, faster off chip IO and more resources. github.com/JulianKemmer... #rtl #hls #verilog #vhdl #asic #eda

aof banner
2026-02-12

Check out PipelineC #HDL Advent of FPGA #hardware solutions: high perf, deeply pipelined, multiple #FPGA platforms, 10's Gbit per sec throughput, easily scales: variable latency off chip mem, faster off chip IO and more resources.

github.com/JulianKemmerer/Pipe

#rtl #hls #verilog #vhdl #asic #eda

aof banner
2026-02-04

Got my latest beast of a machine - Bitmain Antminer S21+ HYD - 338 TH/s Bitcoin ASIC miner installed yesterday which brings my total hashrate to 578 TH/s ... FUCK YEAH!!! ... 😎

2026-02-04

«Если ты не страдал — ты не считаешься ПЛИСоводом»: подкаст «Битовые маски» с Михаилом Коробковым

В подкасте «Битовые Маски» ведущие Лена Лепилкина и Антон Афанасьев обсуждают с экспертами системное программирование и разработку «железа». В 25-м выпуске гостем стал Михаил Коробков — создатель сообщества FPGA-Systems и одноименного журнала, ПЛИСовод-энтузиаст и по совместительству старший инженер по разработке СнК Погружаемся в ПЛИСоводство →

habr.com/ru/companies/yadro/ar

#fpgasystems #fpga #asic #xilinx #altera #плис #lattice #embedded_fpga #highlevel_synthesis #efpga

Orbit News Huborbitnewshub
2026-02-02

Sarah Court Appointed as ASIC Chair: A New Era of Aggressive Corporate Enforcement Begins

orbitnewshub.com/sarah-court-a

Video Processing WikiPythonLinks
2026-01-26

ASIC and FPGA Hybrid Meetups

A new group is being formed. Meetups will be held monthly in , and occasionally in other European cities if a speaker and venue can be found. The plan is to make this into a hybrid meetup, so people from all over the world can participate, while the speaker benefits from live audience feedback.

wiki.pythonlinks.info/asic-and

An image (Logo) with the word "Meetup" writen on it.  red and white background.
Video Processing WikiPythonLinks
2026-01-26

ASIC and FPGA Meetup #1

The first talk will be "Open Source Video Processing Pipelines" by Christopher Lozinski. Febuary 10, 2026 in .

We are looking for speakers.

wiki.pythonlinks.info/asic-and

ASIC and FPGA Meetups
GripNewsGripNews
2026-01-25

🌘 距離 tapeout 還有兩週 · 線上傳奇
➤ 在開源工具鏈的助力下,一場與時間賽跑的 ASIC 設計馬拉松
essenceia.github.io/projects/t
作者在極短的兩週時間內,從零開始設計了一個用於 AI 運算的脈動陣列(Systolic Array)矩陣乘法加速器,並同時搭建了完整的矽除錯基礎設施(JTAG TAP)。這項任務是透過參與由 Tiny Tapeout 主辦的實驗性流片(tapeout)專案完成的。文章詳細描述了作者如何利用開源工具鏈(如 OpenROAD 與 Librelane)、現有的程式碼庫以及 FPGA 原型驗證,來克服時間緊迫與設計複雜性的雙重挑戰,最終在截止日期前完成了 GDSII 檔案的生成。
+ 「脈動陣列搭配 JTAG 除錯,這在兩週內完成簡直是個奇蹟。作者對開源 EDA 工具的熟練度令人印象深刻。」
+ 「看完這篇文章,我對 Tiny Tapeout 的實驗性流片計畫更感興趣了,這似乎是硬體工程師練手的
設計 驗證

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